Hello! 👋🏽 I'm Vihaan.
Hardware design verification by trade, automation by habbit.
I'm a young engineer in San Jose, CA, passionate about applied AI systems in hardware design verification.
Most of my work is research oriented, focusing on extending existing methodolgies or building new ones for LLM augmented automations, primarily in DV workflows.
Featured work: Understanding Inference-Time Token Allocation and Coverage Limits in Agentic Hardware Verification. Published at MLCAD 2026. Code. Blog.
I occasionally ponder and write about my opinions, ideas, philosophies, lessons, and more, largely around AI. Do reach out if you resonate or disagree, would love to connect!
