

MetaSolver
An adaptive reasoning agent that routes questions across 7+ inference-time strategies + an evaluation harness with 1,000+ test instances under a strict LLM call budget.

Custom CUDA Kernels Bindings
Python bindings for custom CUDA kernels.

Python Sandbox API
Sandboxed Python execution API. Built with nsjail and Flask. Deployed on Google Cloud Run.

Pomodoro Max
A minimal local-first focus timer with live efficiency tracking, built with Tauri and synced to Notion.

Medical Image Classification with DL
Benchmarking on MedMNIST datasets using frameworks with ResNet architectures.

The Passive-Aggressive Shell
A sarcastic Linux shell integrated with an LLM, provides snarky assistance for invalid commands, and offers guidance on utilities.

Asynchronous FIFO Design and Verification
Parameterized asynchronous FIFO in SystemVerilog, a self-checking SVA/coverage-driven testbench + DPI-based verification.

Pipelined MIPS UVM Verification
Constrained-random UVM environment for a 5-stage pipelined MIPS, with functional coverage over instruction fields, register/memory dependencies, and branch outcomes.

MIPS Multicycle Processor (FPGA)
A MIPS multicycle processor in Verilog, synthesized and deployed on a Nexys A7-100T FPGA, demonstrated on hardware with a rotating-LED program.

Matrix Multiplier (FPGA)
A 4x4 systolic matrix multiplier in Verilog with integrated RAM, synthesized for a Nexys A7-100T FPGA.
studiovistara.com
A modern and sleek website design for Studiovistara, an architecture firm based in India.
jeeyapatel.studio
A web page for Jeeya Patel's Architecture Portfolio
jainampatel.vercel.app
A web page for Jainam Patel's Architecture Portfolio






